On-line Thermal Aware Energy Optimization via Dynamic Voltage Selection for Multiprocessor System-On-Chip

In recent decades, the use of electronic systems, especially embedded systems such as mobile phones has been expanding rapidly. Such products use minimal amount of materials, generate less waste and noise, save space, and are considered cost-effective and attractive. In such devices, consideration needs to be given to both high power density and high chip working temperature. According to the advanced scaling technology, leakage power becomes a major issue in terms of power consumption and this in turn influences temperature. Consequently, energy optimization is an important issue in the design of such electronic products. Techniques for energy optimization have been proposed for circuit-level up to the system-level. This study is focused on a system-level model for a multiprocessor system, considering the inter-dependency between leakage power and temperature. The study applies an on-line temperature-aware dynamic voltage selection (DVS) approach to save energy. The method is evaluated and compared to the static approach, which assumes that tasks always execute their worst case number of clock cycles (WNC) allowing for the exploitation of only the static slack. On-line thermal aware DVS allows the exploitation of both the static and dynamic slacks, since the actual number of clock cycles is usually less than the WNC.